Storing data in three dimensions with racetrack memory

Work from researchers at IBMs Almaden Research Laboratory suggests that a new type of computer memory storage may be on the horizon. Currently, computer memory comes in one of two flavors: solid state RAM or magnetic hard disk drives, both of which rely on what's effectively two-dimensional storage. The new method adds some useful features to memory storage by extending the physical storage into the third dimension.

Over the past few years, an IBM research team, led by Stuart S. P. Parkin, has been developing a new method for storing information. Called racetrack memory (RM), it relies on U-shaped nanowires that are arranged perpendicular to the surface of a chip and act as a shift register. Bits can be read or written at the base of the wire. Once on the wire, bits can then be moved around as if they're on a memory stack thanks to nanosecond pulses of current applied to the ends of the U that shift all the bits to new locations on the wire.

A pair of articles from the Almaden group that describe RM appear in this week's edition of Science, the first describing the technology in depth, and the second reporting the construction of a simplified working device. The review article¹ lays out the basics of racetrack memory. The smallest unit of RM is a U-shaped nanowire, with data stored in magnetic domain walls (DWs) arrayed along its length. A collection of these nanowires can be built onto a single chip, producing a memory density greater than anything solid state memory can currently handle. According to the researchers, even a two-dimensional RM setup would have a memory density higher than nearly all current solid state offerings.

Cartoon schematic of a single racetrack wire
Image credit: IBM Almaden Research Labs

DW-based bits are accessed using current pulses that exploit the phenomenon of spin-momentum transfer. The current shifts the entire set of bits along the wire, exposing a different DW to the reader and/or writer at the base. The system has some very appealing properties. The cost of storing a single bit is actually reduced as the number of DWs per racetrack increases. The average time needed to read a given bit is also independent of the number of DWs per racetrack—essentially, there's a "the more the merrier" situation when it comes to data density.Thanks to the fact that there are no moving parts, there is also no obvious fatigue or wearout mechanism for RM.

If RM devices pan out, they could potentially offer the low cost of HDD technology with the performance and reliability of solid-state devices. Because of these properties, interest in DW devices has fluctuated over the years. They were first proposed in the 1970s, and there was a flurry of research in the late seventies and early eighties on "magnetic bubble materials." That work never panned out due to technological hurdles that could not be overcome at the time. The accompanying research paper² suggest those hurdles might be a thing of the past, as it describes the successful creation of a two-dimensional racetrack memory nanowire device.

The device is a single nanowire laid flat on a substrate, with read/write heads in the center of the wire and the current pulse generators that move the bits around on the ends of the wire. The wire is made of permalloy (Ni₈₁Fe₁₉), measured 200 nm in diameter, and extended six microns between the electrical contacts at each end. Sending 1.6V pulses across the wire produced a current density of nearly 2x10⁸ A/cm².

The setup functioned as a DW shift register memory device, the equivalent of a three-bit unidirectional serial-in, serial-out memory setup. The researchers were able to encode a series of information one bit at a time, shifting the memory down and then reading the data back out. The time needed to encode and shift one bit to was approximately 30ns and the authors suggest that the average access time for RM will be between 10 and 50ns. This compares reasonably well to the 5ms typical of HDD-based technology, and around 10ns for advanced solid state devices.

The researchers conclude their article by stating, "the motion of a series of DWs at high speed using nanosecond current pulses not only proves the viability of a shift-register memory but also presages the possibility of current-controlled DW–based logic devices." There is still work to do before an entire three-dimensional memory chip will replace your current memory solutions. The biggest problem may be heat; moving DWs requires a high current, which may destroy the wire or mangle the data it contains. Still, there are some ideas on how to deal with the heat, and this work represents a big step in the direction of a new dimension in memory storage.

[1] Science, 2008. DOI: 10.1126/science.1145799
[2] Science, 2008. DOI: 10.1126/science.1154587

IBM smacks rivals with 5.0GHz Power6 beast

The rest of the server world can play with their piddling 2-3GHz chips. IBM, meanwhile, is prepared to deal in the 5GHz realm.

The hardware maker has unveiled a Power6-based version of its highest-end Unix server - the Power 595. The box runs on 32 dual-core 5GHz Power6 processors, making it a true performance beast. This big box completes a protracted roll out of the Power6 chip across IBM's Unix server line.

Along with the big daddy, IBM revealed a new water-cooled version of the Power 575 server dubbed the Hydro-Cluster. In addition, it refreshed the existing midrange Power 570 server.

IBM's top Power executives showed off the fresh gear during a customer and press event here in San Francisco. They wheeled out three Power customers who were thrilled to be part of IBM's Unix experience. We guess that a disgruntled Power user or two could not be located on short notice to provide balance.

The Power 595 ships in a massive cabinet that looks just like that of its predecessors, except IBM has added a few green touches to the case. This green reflects the environmentally friendly nature of IBM's hulking metal tower, we're told.

The Power 595, available on May 6, relies on a series of four-socket "books" or boards. You can fill a system with between one and eight boards, using both 4.2GHz and 5.0GHz chips. This monster can hold up to 4TB of DDR2 memory. You'll find the rest of the specifications here where IBM details the various options with its I/O drawers.

Usually, IBM will hit customers with a massive TPC benchmark score when it rolls out a new 595-class system - just to let HP know how much it cares. Apparently, the company is saving that gem for a later date, opting instead just to show how the Power 595 wallops HP's Itanium gear and Sun's SPARC systems on SAP and SPEC benchmarks. We're told that IBM's new system beats out the rivals by 2x to 3x. We thought it rather sporting of IBM to include Sun's gear in the benchmarks.

The Power 575 is a different type of high-end creature with IBM characterizing the system as a supercomputing machine. As mentioned, IBM has layered water-filled coils over each of the boards in the 575, allowing it to create a more dense design.

Customers can fit up to 14 2U boards in the huge 575 case with 16 4.7GHz dual-core chips per board. You'll also manage to outfit each board with up to 256GB of memory. The rest of the rather complex specifications are here.

According to IBM, the water-cooling can reduce typical data center energy consumption by 40 per cent when compared to air cooled 575s. In addition, the refreshed box offers up 5x the performance of older 575 systems. IBM has benchmarked a single 575 board at 600 GFlops.

The system will ship in May, running AIX or Linux.

The refreshed 570 still runs on 3.5-4.7GHz versions of Power6, just as it has done since last year. Now, however, customers can tap a "hot node" feature that lets them add additional systems to an already running box for extra horsepower and storage. IBM has shipped 8,000 of the systems to date.

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DARPA project reads the brain waves of image analysts to speed up intelligence triage

PHOTO: Jonathan Nourok/Getty Images

3 April 2008—We may need computers to tell us the square root of 529 679, but for now, at least, they still need us to recognize a kitten napping in a box of yarn. The point goes to the humans for our keen sense of the relationship between objects, our eye for texture, and our understanding of emotional relevance, but we don't wield these abilities with great speed. This slowness, unfortunately, has caused intelligence agencies a good deal of distress. They collect surveillance images from satellites, infrared sensors, and aerial-mounted cameras so quickly that analysts must struggle to keep up.

But what if we could combine the speed of a computer with the sensitivity of the human brain? Teams of researchers at Honeywell, Teledyne Scientific and Imaging, and Columbia University are busy hooking image analysts up to EEG machines, reading their brain activity, and speeding up data sorting sixfold. Their research is for a Defense Advanced Research Projects Agency (DARPA) program called Neurotechnology for Intelligence Analysts, which began its second of three phases this year. Each phase whittles down the number of participating research teams, and by the end, DARPA expects to have one team with a superior system.

“This [system] could be used for searching for desired images in a large database of images. It would be faster than a manual search,” says Deniz Erdogmus, a computer science professor at Oregon Health & Science University, in Portland, who collaborates with the group at Honeywell. Erdogmus presented an EEG approach to image triage on 2 April at the IEEE International Conference on Acoustics, Speech, and Signal Processing, in Las Vegas.

Erdogmus explains that it takes humans about 300 milliseconds to consciously recognize specific information in a picture—an adult face among children, for example. It takes another 200 ms for the person to react physically, say, by pushing a button as an analyst would do. But even before a person is conscious of what he or she is seeing—about 150 ms after being shown an image—the electrical activity in the brain's visual cortex has already spiked. The activity is called an event related potential, or ERP.

In Erdogmus's experiments, which DARPA funded, six professional image analysts watched as aerial photographs flashed on a computer screen, more than five of them per second. The analysts were told to search the terrain for large targets, such as golf courses. Meanwhile, a 32-electrode EEG cap, plastered to the analysts' heads, detected brain activity that was then recorded in a separate computer. After the experiment, Erdogmus ran the recordings through a program that flagged any pictures whose appearance coincided with an ERP. While his analysis pulled out many false targets, it rarely missed a real one. Even if it were used to isolate candidate targets for another analyst to scrutinize more closely, the technique could save a lot of time, says Erdogmus. For the system to meet DARPA standards, the analysis will have to happen concurrently with the recordings. The research team at Columbia University, in New York City, has already shown that it can analyze its data in real time, says Paul Sajda, an associate professor of biomedical engineering and the project leader at Columbia.

One main challenge in using the technique has been clearly detecting a signal against the background of normal brain activity. The Oregon lab uses a commercial EEG electrode cap that detects and evenly weighs signals from all parts of the brain. The baseline hum of activity in the human brain produces a voltage signal of 10 to 100 microvolts, while the ERP signal has an amplitude of only 1 to 10 microvolts.

Another problem is that the brain continues to respond electrically even after the image disappears, which makes it difficult to match signals with the pictures that evoked them. In an effort to get around that problem, Erdogmus has been refining a strategy to calibrate the system for each new user. During a training period, images are presented in controlled sequence so that the responding brain signals won't overlap. In these trials, the analyst must push a button in response to target pictures. This gives the computer a clear indication of what each person's ERP looks like so that it can better sort out overlapping ones.

The question remains whether watching images in rapid sequence will tire analysts out faster and ultimately make them less efficient. Catherine Huang, a graduate student in the Erdogmus lab who has tried the procedure, says it's essential to take small breaks between chunks of images but that even after an hour of watching satellite images flash past, she didn't feel tired. “Each block is only 5 seconds, and you can take a break for as long as you want,” she says. Honeywell has reported the same feedback from the subjects in its in-house experiments. Teledyne could not be reached for comment.

The real difficulty could be in making the system user-friendly. “Even though our system is faster, we still need to hook up the electrode to the head. So we are not sure if the user will accept this,” says Huang. Securing an electrical connection between the ERP cap and the analyst's head usually requires dousing the scalp in a conductive gel, and with all the necessary wires, the user must sit there looking like a futuristic Medusa.